Boards and modules

Raspberry Pi GPIO pinout

The 40-pin GPIO header shared by the Raspberry Pi 5, 4, 3 and Zero, and the 40-pin Raspberry Pi Pico, with every pin’s functions.

40-pin GPIO header - Raspberry Pi 5, 4, 3, Zero / Zero 2 W (also A+/B+, 2, 400)

PowerDataGroundDigital I/OSpecial

Tap or hover any pin to see what it does.

Every Raspberry Pi since the 2014 Model B+ has the same 40-pin GPIO header: 26 general-purpose pins plus 3.3 V, 5 V and ground. Pin numbers count the physical position on the header (odd numbers along one row, even along the other); the GPIO or BCM numbers are what software uses.

The GPIO pins are 3.3 V logic and not 5 V tolerant: connecting a 5 V signal directly can destroy the processor. Use a level shifter or a resistor divider for 5 V sensors. The Raspberry Pi Pico is a microcontroller board, not a computer, and has its own 40-pin layout shown in the second tab.

40-pin GPIO header: every pin

Pin	Name	Function
1	3V3	3.3 V supply outputPins 1 and 17. Shares the board's 3.3 V regulator with the SoC; keep external loads small.
2	5V	5 V supplyPins 2 and 4 sit on the board's 5 V supply rail, fed from the USB power input and not regulated by the Pi. Whatever you draw here comes out of the power supply's budget.
3	GPIO2 (SDA)	I2C1 SDA - the default user I2C bus (/dev/i2c-1)Has a fixed pull-up resistor to 3.3 V on the board, so it reads high when nothing is connected.
4	5V	5 V supplyPins 2 and 4 sit on the board's 5 V supply rail, fed from the USB power input and not regulated by the Pi. Whatever you draw here comes out of the power supply's budget.
5	GPIO3 (SCL)	I2C1 SCLFixed on-board pull-up to 3.3 V, like GPIO2.
6	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
7	GPIO4 (GPCLK0)	General-purpose clock output GPCLK0; Default data pin of the 1-Wire (w1-gpio) overlay
8	GPIO14 (TXD)	UART transmit (serial TX)Pi 3/4 and Zero W/2 W: driven by the mini UART by default (the full PL011 serves Bluetooth). Pi 5: UART0 of RP1 when enabled; the default console lives on the separate 3-pin debug UART connector.
9	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
10	GPIO15 (RXD)	UART receive (serial RX)3.3 V levels only - use a 3.3 V USB-serial adapter.
11	GPIO17	SPI1 CE1; UART0 RTS (alternate)
12	GPIO18 (PCM_CLK)	PCM / I2S bit clock; Hardware PWM channel 0 (alternate); SPI1 CE0Pi 1-4: PWM via ALT5 shares channel 0 with GPIO12. Pi 5: independent PWM0 channel 2.
13	GPIO27	General-purpose I/O
14	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
15	GPIO22	General-purpose I/O (no bus assigned by default)
16	GPIO23	General-purpose I/O
17	3V3	3.3 V supply outputPins 1 and 17. Shares the board's 3.3 V regulator with the SoC; keep external loads small.
18	GPIO24	General-purpose I/O
19	GPIO10 (MOSI)	SPI0 MOSI (controller out)
20	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
21	GPIO9 (MISO)	SPI0 MISO (controller in)
22	GPIO25	General-purpose I/O
23	GPIO11 (SCLK)	SPI0 SCLK
24	GPIO8 (CE0)	SPI0 chip select 0 (CE0)
25	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
26	GPIO7 (CE1)	SPI0 chip select 1 (CE1)
27	GPIO0 (ID_SD)	HAT ID EEPROM data (I2C0 SDA)Reserved for the HAT identification EEPROM. Leave unconnected unless you are building a HAT.
28	GPIO1 (ID_SC)	HAT ID EEPROM clock (I2C0 SCL)Reserved for the HAT identification EEPROM, as GPIO0.
29	GPIO5 (GPCLK1)	General-purpose clock GPCLK1 (Pi 5: RP1 GPCLK[1])
30	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
31	GPIO6 (GPCLK2)	General-purpose clock GPCLK2 (Pi 5: RP1 GPCLK[2])
32	GPIO12 (PWM0)	Hardware PWM channel 0Pi 1-4/Zero: shares PWM channel 0 with GPIO18. Pi 5: independent PWM0 channel 0.
33	GPIO13 (PWM1)	Hardware PWM channel 1Pi 1-4/Zero: shares PWM channel 1 with GPIO19. Pi 5: independent PWM0 channel 1.
34	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
35	GPIO19 (PCM_FS)	PCM / I2S frame (LR) clock; Hardware PWM channel 1 (alternate); SPI1 MISOPi 1-4: PWM via ALT5 shares channel 1 with GPIO13. Pi 5: independent PWM0 channel 3.
36	GPIO16	SPI1 CE2; UART0 CTS (alternate)
37	GPIO26	General-purpose I/O
38	GPIO20 (PCM_DIN)	PCM / I2S data in; SPI1 MOSI; GPCLK0 (alternate)
39	GND	GroundGround pins: 6, 9, 14, 20, 25, 30, 34, 39.
40	GPIO21 (PCM_DOUT)	PCM / I2S data out; SPI1 SCLK; GPCLK1 (alternate)

Raspberry Pi Pico / Pico 2 (also Pico W / Pico 2 W): every pin

Pin	Name	Function
1	GP0	UART0 TX (SDK default); I2C0 SDA; SPI0 RX; PWM0 A
2	GP1	UART0 RX (SDK default); I2C0 SCL; SPI0 CSn; PWM0 B
3	GND	Ground
4	GP2	I2C1 SDA; SPI0 SCK; PWM1 A
5	GP3	I2C1 SCL; SPI0 TX; PWM1 B
6	GP4	I2C0 SDA (SDK default); UART1 TX; SPI0 RX; PWM2 A
7	GP5	I2C0 SCL (SDK default); UART1 RX; SPI0 CSn; PWM2 B
8	GND	Ground
9	GP6	I2C1 SDA; SPI0 SCK; PWM3 A
10	GP7	I2C1 SCL; SPI0 TX; PWM3 B
11	GP8	UART1 TX; I2C0 SDA; SPI1 RX; PWM4 A
12	GP9	UART1 RX; I2C0 SCL; SPI1 CSn; PWM4 B
13	GND	Ground
14	GP10	I2C1 SDA; SPI1 SCK; PWM5 A
15	GP11	I2C1 SCL; SPI1 TX; PWM5 B
16	GP12	UART0 TX; I2C0 SDA; SPI1 RX; PWM6 A
17	GP13	UART0 RX; I2C0 SCL; SPI1 CSn; PWM6 B
18	GND	Ground
19	GP14	I2C1 SDA; SPI1 SCK; PWM7 A
20	GP15	I2C1 SCL; SPI1 TX; PWM7 B
21	GP16	SPI0 RX (SDK default); I2C0 SDA; UART0 TX; PWM0 A
22	GP17	SPI0 CSn (SDK default); I2C0 SCL; UART0 RX; PWM0 B
23	GND	Ground
24	GP18	SPI0 SCK (SDK default); I2C1 SDA; PWM1 A
25	GP19	SPI0 TX (SDK default); I2C1 SCL; PWM1 B
26	GP20	I2C0 SDA; PWM2 A
27	GP21	I2C0 SCL; PWM2 B
28	GND	Ground
29	GP22	General-purpose I/O; PWM3 A
30	RUN	Chip enable / reset inputInternal pull-up of about 50 kΩ to 3.3 V. Short to GND to reset the microcontroller.
31	GP26 / ADC0	ADC input 0; I2C1 SDA; PWM5 AADC-capable pins have a protection diode to the 3.3 V rail: keep them below about 3.3 V + 0.3 V, and do not drive them while the board is unpowered.
32	GP27 / ADC1	ADC input 1; I2C1 SCL; PWM5 BSame ADC voltage limits as GP26.
33	AGND	Analog ground reference for GP26-29Separate analog ground plane for GP26-29; tie to ordinary GND if ADC accuracy is not critical.
34	GP28 / ADC2	ADC input 2; PWM6 ASame ADC voltage limits as GP26.
35	ADC_VREF	ADC supply and reference voltageFiltered from the 3.3 V rail on the board (R-C filter). Can take an external reference such as a 3.0 V shunt for better ADC accuracy.
36	3V3(OUT)	3.3 V output from the on-board SMPSKeep external loads under about 300 mA (actual headroom depends on VSYS and board load).
37	3V3_EN	Enable input of the 3.3 V SMPSPulled up to VSYS through 100 kΩ. Ground it to switch the 3.3 V supply off, which also powers the microcontroller down.
38	GND	Ground
39	VSYS	Main system input, 1.8-5.5 VFeeds the buck-boost SMPS. When USB is plugged in, VSYS = VBUS minus a Schottky diode drop. Add another supply here through its own diode (OR-ing).
40	VBUS	USB 5 V input (micro-USB pin 1)About 5 V when USB is connected, 0 V otherwise. Allowed range 5 V ±10 %.
SWCLK	SWCLK	Serial Wire Debug clock3-pin DEBUG header at the board's bottom edge.
DBG-GND	GND	Ground for the debug header
SWDIO	SWDIO	Serial Wire Debug data

Key facts

40-pin header: all GPIO use 3.3 V logic and are NOT 5 V tolerant. Feeding 5 V into any GPIO pin can destroy the processor; use a level shifter or divider for 5 V signals.
40-pin header: physical pin numbers (1-40) are not GPIO numbers. Software such as gpiozero uses the Broadcom (BCM) GPIO number by default. Run 'pinout' on the Pi for a board-specific map.
40-pin header power pins: 3.3 V on 1 and 17, 5 V on 2 and 4, ground on 6, 9, 14, 20, 25, 30, 34, 39.
40-pin header current: Raspberry Pi rates an individual GPIO at up to 16 mA and all GPIO combined at 50 mA. The pads are designed for 16 mA, but the 3.3 V supply was budgeted at roughly 3 mA per pin, so heavy loads on many pins at once are unsafe. On Pi 4 (BCM2711) each drive-strength step gives half the current of older models (8 mA at maximum drive).
40-pin header: GPIO2 and GPIO3 (pins 3 and 5) are the I2C1 bus and carry fixed on-board pull-up resistors to 3.3 V.
40-pin header: GPIO0 and GPIO1 (pins 27 and 28, ID_SD/ID_SC) are reserved for the HAT identification EEPROM.
40-pin header SPI0: MOSI GPIO10 (pin 19), MISO GPIO9 (21), SCLK GPIO11 (23), CE0 GPIO8 (24), CE1 GPIO7 (26). SPI1: MOSI GPIO20 (38), MISO GPIO19 (35), SCLK GPIO21 (40), CE0 GPIO18 (12), CE1 GPIO17 (11), CE2 GPIO16 (36).
40-pin header UART: TX GPIO14 (pin 8), RX GPIO15 (pin 10). Pi 3, Pi 4 and Zero W / Zero 2 W put the less capable mini UART here by default because the PL011 is used for Bluetooth. On Pi 5 the default serial console is the separate 3-pin 'UART' debug connector; GPIO14/15 become RP1 UART0 when enabled.
40-pin header PWM: hardware PWM is available on GPIO12, 13, 18 and 19. Pi 1-4 and Zero have only two channels there (GPIO12 and 18 share one, GPIO13 and 19 the other); Pi 5's RP1 gives four independent channels. Software PWM works on any pin.
40-pin header PCM/I2S audio: CLK GPIO18 (pin 12), FS GPIO19 (35), DIN GPIO20 (38), DOUT GPIO21 (40).
40-pin header: the 1-Wire overlay uses GPIO4 (pin 7) unless told otherwise.
40-pin header: every GPIO starts as an input after reset. On Pi 4 the default pulls are up on GPIO0-8 and down on GPIO9-27.
40-pin header input thresholds: Pi 4 (BCM2711) reads ≤ 0.8 V as low and ≥ 2.0 V as high; BCM2835/6/7-based boards (Zero, 3) use ≤ 0.9 V and ≥ 1.6 V. Internal pull resistors are about 50-65 kΩ (older SoCs) or 33-73 kΩ (BCM2711).
Raspberry Pi 5: the header is driven by the RP1 I/O controller (linked to the main SoC over PCIe). Pin positions and main functions match the Pi 4. RP1 pads drive 2, 4, 8 or 12 mA and tolerate up to 3.63 V while the board is unpowered - still not 5 V tolerant.
Raspberry Pi 5 / RP1 offers five UARTs, four I2C buses and several SPI blocks on the header through alternate functions (enabled with device-tree overlays).
Zero, Zero W and Zero 2 W boards without the 'H' suffix ship with the 40 holes unpopulated; the pinout is identical.
Pico: Pico, Pico W, Pico 2 and Pico 2 W share the same 40-pin edge pinout and footprint (castellated, 2.54 mm pitch).
Pico: 26 GPIO are on the edge pins - GP0-GP22 and GP26-GP28. GP23, GP24, GP25 and GP29 are used on the board (SMPS power-save, VBUS sense, LED, VSYS/3 measurement); on the W versions they run the wireless chip and the LED moves to the wireless chip.
Pico: 3.3 V logic. RP2040 (Pico) pins are not 5 V tolerant (absolute maximum = 3.3 V supply + 0.5 V). RP2350 (Pico 2) digital pins GP0-GP22 tolerate up to 5.5 V while the board is powered, but the ADC pins GP26-28 do not.
Pico ADC: 12-bit, 500 ksps, inputs on GP26, GP27, GP28 (ADC0-2); ADC3 (GPIO29) measures VSYS/3 on the board. The reference is ADC_VREF, filtered from the 3.3 V rail.
Pico power: VBUS (pin 40) is USB 5 V; VSYS (pin 39) accepts 1.8-5.5 V; 3V3(OUT) (pin 36) can power external parts - keep it under about 300 mA; ground 3V3_EN (pin 37) to turn the 3.3 V supply off; short RUN (pin 30) to ground to reset.
Pico SDK default pins: UART0 on GP0/GP1, I2C0 on GP4/GP5, SPI0 on GP16 (RX), GP17 (CSn), GP18 (SCK), GP19 (TX). Every GPIO can be a PWM output: slice = (GPIO ÷ 2) mod 8, channel A on even and B on odd GPIO numbers.
Pico GPIO current: drive strength 2/4/8/12 mA (default 4 mA). Total current through all GPIO is limited to 50 mA on RP2040 and 100 mA on RP2350.
Pico 2 boards built with the early RP2350 A2 stepping have erratum E9: an input relying only on the internal pull-down can float near 2.2 V. Use an external pull-down of 8.2 kΩ or less; the fault is fixed from stepping A3.

Sources

Pin assignments were checked against these references on 2026-10-14. The diagram is our own drawing.

Questions people ask

Are Raspberry Pi GPIO pins 5 V tolerant?

No. They are 3.3 V only. Feed them 5 V signals through a level shifter or a voltage divider.

What is the difference between pin numbers and GPIO numbers?

Pin numbers (1–40) are physical positions on the header. GPIO (BCM) numbers are the processor’s names that libraries use; for example physical pin 11 is GPIO 17.

How much current can a GPIO pin supply?

Keep each pin to a few milliamps (around 16 mA absolute maximum on older models) and the total small. Drive LEDs through a resistor and anything bigger through a transistor or driver.

Is the Raspberry Pi 5 GPIO header the same as the Pi 4?

The physical layout and default functions are the same, but on the Pi 5 the pins are driven by the new RP1 I/O controller, so some low-level libraries changed.